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The Intel 4004 Microprocessor and the Silicon Gate Technology
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A testimonial from Federico Faggin, designer of the 4004 and developer of its enabling technology
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Busicom
Busicom was a Japanese
manufacturer of electronic calculators. The company was one of many
international contenders in the nascent electronic calculator business. The
availability of MOS LSI (large-scale-integration) technology, had just started a
fundamental change in the calculator business from electromechanical to
electronic. In 1969, Busicom had developed a modular design for a family of
high-end calculators based on a special-purpose, macro-instruction computer that
operated on shift-register memory. Looking for a competitive advantage and
having heard that Intel had the highest density and fastest technology
available, Busicom went to Intel with the purpose to have their logic design
converted into seven chips. Ted Hoff, the manager of the Application
Department of Intel evaluated the proposal and felt that the Busicom design
could be both simplified and improved by replacing the special-purpose, ROM and
shift-register-based computer with a general-purpose, ROM and RAM-based
architecture. Working with Busicom engineers and later with Stan Mazor, Hoff
defined the basic architecture of the computer, inspired by the architecture of
other CPU's of the time, and was able to convince both Intel and Busicom
managements that his approach was superior to the previous one.
Hoff’s proposal consisted of four different chips: a 2048-bit ROM with a 4-bit programmable input-output
port (4001); a 4-registers x 20-locations x 4-bit RAM data memory with a 4-bit
output port (4002); an input-output expansion chip, consisting of a static shift
register with serial input and serial/parallel output (4003); and the 4-bit CPU
chip (4004). Busicom entered into an exclusive contract with Intel for the
development of the chip set in October 1969. Intel agreed to start the design
immediately and produce working samples one year later. The proposal, however,
lay dormant for six months until Faggin, hired to lead the project, joined Intel
in April 1970 and started to work furiously to contain the schedule
slippage.
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