The Bootstrap Load
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The Intel 4004 Microprocessor and the Silicon Gate Technology
A testimonial from Federico Faggin, designer of the 4004 and developer of its enabling technology
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Silicon Gate Technology
The Buried Contact
The Gilbert Hyatt Patent
The Bootstrap Load
At Fairchild, Faggin also built bootstrap load devices in early 1970, using the silicon gate technology. Bootstrap load is a circuit technique that allows building logic gates with the output voltage equal to the full supply voltage compared with a normal ‘resistive’ load where the output voltage reaches about 60% of the supply voltage. The bootstrap load devices required the fabrication of good-quality capacitors on a chip that were thought impossible to manufacture with SGT without using an extra masking layer. Faggin, a physicist, came to the solution thanks to: "an understanding of the physics of how devices work, because in a bootstrap load what you need to do is to always have a virtual junction, instead of a physical junction." (Faggin, in a 2007 oral panel interview with David House CHM), and he showed how to make bootstrap load devices without an extra masking layer.

The buried contact and particularly the bootstrap load, were indispensable to obtain the required speed within the available power budget. The only other design technique with the correct speed-power product, available at that time, was the more cumbersome four-phase design used by Four-Phase Systems, Inc. and by Rockwell. Rockwell used it in their first microprocessor, the PPS-4, which was completed nine months after Intel’s 4004.

Original schematic of the 4004 showing bootstrap loads
Photo of the original schematic of the 4004 showing bootstrap loads
Detail in the original diagram of the Arithmetic Unit (ARU) of the 4004 with original pencil notations by F. Faggin. A ‘resistor’ symbol in the schematic indicates an MOS transistor with its gate connected to its drain and used as a resistive load. When a “B” is shown next to a resistor symbol, a bootstrap load needs to be used. Bootstrap loads in silicon gate are found throughout the 3-sheets schematics.